# SPDX-License-Identifier: GPL-3.0-or-later
#
# Copyright (C) 2005-2022 Free Software Foundation, Inc.
# Copyright (C) 2022 Kernkonzept GmbH.
# Author(s): Georg Kotheimer <georg.kotheimer@kernkonzept.com>

# --- From libgcc/Makefile.in ---
enable_execute_stack = enable-execute-stack-empty.c
unwind_header = config/arm/unwind-arm.h
md_unwind_header = no-unwind.h
sfp_machine_header = arm/sfp-machine.h
thread_header-l4api-plain := gthr-single.h
thread_header-l4api-l4f   := gthr-posix.h
thread_header = $(thread_header-l4api-$(L4API))

# List of extra object files that should be compiled for this target machine.
# The rules for compiling them should be in the t-* file for the machine.
EXTRA_PARTS = crtbegin.o crtbeginS.o crtbeginT.o crtend.o crtendS.o


# --- From libgcc/config/t-eh-dw2-dip ---
$(eval $(call libgcc_include_config,t-eh-dw2-dip))


# --- From libgcc/config/arm/t-arm ---
$(eval $(call libgcc_include_config,arm/t-arm))


ifeq ($(BID_VARIANT_FLAG_NOFPU),)
# -- From libgcc/config/t-crtfm ---
EXTRA_PARTS += crtfastmath.o
$(eval $(call libgcc_include_config,t-crtfm))
endif


# -- From libgcc/config/arm/t-elf ---
# For most CPUs we have an assembly soft-float implementations.
# However this is not true for ARMv6M.  Here we want to use the soft-fp C
# implementation.  The soft-fp code is only build for ARMv6M.  This pulls
# in the asm implementation for other CPUs.
LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func \
                _call_via_rX _interwork_call_via_rX \
                _lshrdi3 _ashrdi3 _ashldi3 \
                _clzsi2 _clzdi2 _ctzsi2

ifeq ($(BID_VARIANT_FLAG_NOFPU),)
LIB1ASMFUNCS +=  _arm_negdf2 _arm_addsubdf3 _arm_muldivdf3 _arm_cmpdf2 _arm_unorddf2 \
                _arm_fixdfsi _arm_fixunsdfsi \
                _arm_truncdfsf2 _arm_negsf2 _arm_addsubsf3 _arm_muldivsf3 \
                _arm_cmpsf2 _arm_unordsf2 _arm_fixsfsi _arm_fixunssfsi \
                _arm_floatdidf _arm_floatdisf _arm_floatundidf _arm_floatundisf
endif

# -- From libgcc/config/arm/t-bpabi ---
# Prevent make from trying to build bpabi.S from bpabi.c via generic BID rules.
# Match on any version in case old dependency info still points to
# another/older version.
$(LIBGCC_PKG_DIR)/contrib/gcc-%/libgcc/config/arm/bpabi.S: ;

# Add the bpabi.S functions.
LIB1ASMFUNCS += _aeabi_lcmp _aeabi_ulcmp _aeabi_ldivmod _aeabi_uldivmod

# Add the BPABI C functions.
LIB2ADD += config/arm/bpabi.c \
           config/arm/unaligned-funcs.c

ifeq ($(BID_VARIANT_FLAG_NOFPU),)
LIB2ADD_ST += config/arm/fp16.c
endif

LIB2ADDEH = config/arm/unwind-arm.c \
            config/arm/libunwind.S \
            config/arm/pr-support.c unwind-c.c

# On ARM, specifying -fnon-call-exceptions will needlessly pull in
# the unwinder in simple programs which use 64-bit division.  Omitting
# the option is safe.
LIB2_DIVMOD_EXCEPTION_FLAGS := -fexceptions

CFLAGS_config/arm/fp16.c = -Wno-missing-prototypes
CFLAGS_config/arm/unwind-arm.c = -Wno-cast-qual

# --- From config/arm/t-linux-eabi adjusted for L4 ---
# TODO:
# Use a version of div0 which raises SIGFPE, and a special __clear_cache.
# LIB1ASMFUNCS := $(filter-out _dvmd_tls,$(LIB1ASMFUNCS)) _dvmd_lnx _clear_cache
ifeq ($(L4API),l4f)
# Currently no implementation for 64-bit atomics on L4.
LIB2ADD_ST += config/arm/l4-atomic.c \
            # config/arm/linux-atomic-64bit.c

CFLAGS_config/arm/l4-atomic.c = -Wno-builtin-declaration-mismatch
endif


ifeq ($(BID_VARIANT_FLAG_NOFPU),)
# --- From libgcc/config/t-softfp-sfdf ---
$(eval $(call libgcc_include_config,t-softfp-sfdf))


# --- From libgcc/config/t-softfp-excl ---
$(eval $(call libgcc_include_config,t-softfp-excl))


# --- From libgcc/config/arm/t-softfp ---
$(eval $(call libgcc_include_config,arm/t-softfp))


# --- From libgcc/config/t-softfp ---
$(eval $(call libgcc_include_config,t-softfp))
endif
