L4vbus PCI functions

Collaboration diagram for L4vbus PCI functions:

Functions
L4_BEGIN_DECLS int	l4vbus_pci_cfg_read (l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg, l4_uint32_t *value, l4_uint32_t width)
	Read from the vPCI configuration space using the PCI root bridge.
int	l4vbus_pci_cfg_write (l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg, l4_uint32_t value, l4_uint32_t width)
	Write to the vPCI configuration space using the PCI root bridge.
int	l4vbus_pci_irq_enable (l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t bus, l4_uint32_t devfn, int pin, unsigned char *trigger, unsigned char *polarity)
	Enable PCI interrupt for a specific device using the PCI root bridge.
int	l4vbus_pcidev_cfg_read (l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t reg, l4_uint32_t *value, l4_uint32_t width)
	Read from the device's vPCI configuration space.
int	l4vbus_pcidev_cfg_write (l4_cap_idx_t vbus, l4vbus_device_handle_t handle, l4_uint32_t reg, l4_uint32_t value, l4_uint32_t width)
	Write to the device's vPCI configuration space.
int	l4vbus_pcidev_irq_enable (l4_cap_idx_t vbus, l4vbus_device_handle_t handle, unsigned char *trigger, unsigned char *polarity)
	Enable the device's PCI interrupt.

Detailed Description

Function Documentation

l4vbus_pci_cfg_read()

L4_BEGIN_DECLS int l4vbus_pci_cfg_read	(	l4_cap_idx_t	vbus,
		l4vbus_device_handle_t	handle,
		l4_uint32_t	bus,
		l4_uint32_t	devfn,
		l4_uint32_t	reg,
		l4_uint32_t *	value,
		l4_uint32_t	width )

Read from the vPCI configuration space using the PCI root bridge.

Parameters

	vbus	Capability of the system bus
	handle	Device handle of the PCI root bridge
	bus	Bus number
	devfn	Device id (upper 16bit) and function (lower 16bit)
	reg	Register in configuration space to read
[out]	value	Value that has been read
	width	Width to read in bits (e.g. 8, 16, 32)

Returns

0 on success, else failure

References L4_CV.

Referenced by L4vbus::Pci_host_bridge::cfg_read().

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l4vbus_pci_cfg_write()

int l4vbus_pci_cfg_write	(	l4_cap_idx_t	vbus,
		l4vbus_device_handle_t	handle,
		l4_uint32_t	bus,
		l4_uint32_t	devfn,
		l4_uint32_t	reg,
		l4_uint32_t	value,
		l4_uint32_t	width )

Write to the vPCI configuration space using the PCI root bridge.

Parameters

vbus	Capability of the system bus
handle	Device handle of the PCI root bridge
bus	Bus number
devfn	Device id (upper 16bit) and function (lower 16bit)
reg	Register in configuration space to write
value	Value to write
width	Width to write in bits (e.g. 8, 16, 32)

Returns

0 on success, else failure

References L4_CV.

Referenced by L4vbus::Pci_host_bridge::cfg_write().

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l4vbus_pci_irq_enable()

int l4vbus_pci_irq_enable	(	l4_cap_idx_t	vbus,
		l4vbus_device_handle_t	handle,
		l4_uint32_t	bus,
		l4_uint32_t	devfn,
		int	pin,
		unsigned char *	trigger,
		unsigned char *	polarity )

Enable PCI interrupt for a specific device using the PCI root bridge.

Parameters

	vbus	Capability of the system bus
	handle	Device handle of the PCI root bridge
	bus	Bus number
	devfn	Device id (upper 16bit) and function (lower 16bit)
	pin	Interrupt pin (normally as reported in configuration register INTR)
[out]	trigger	False if interrupt is level-triggered
[out]	polarity	True if interrupt is of low polarity

Returns

On success: Interrupt line to be used, else failure

References L4_CV.

Referenced by L4vbus::Pci_host_bridge::irq_enable().

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l4vbus_pcidev_cfg_read()

int l4vbus_pcidev_cfg_read	(	l4_cap_idx_t	vbus,
		l4vbus_device_handle_t	handle,
		l4_uint32_t	reg,
		l4_uint32_t *	value,
		l4_uint32_t	width )

Read from the device's vPCI configuration space.

Parameters

	vbus	Capability of the system bus
	handle	Device handle of the PCI device
	reg	Register in configuration space to read
[out]	value	Value that has been read
	width	Width to read in bits (e.g. 8, 16, 32)

Returns

0 on success, else failure

References L4_CV.

Referenced by L4vbus::Pci_dev::cfg_read().

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l4vbus_pcidev_cfg_write()

int l4vbus_pcidev_cfg_write	(	l4_cap_idx_t	vbus,
		l4vbus_device_handle_t	handle,
		l4_uint32_t	reg,
		l4_uint32_t	value,
		l4_uint32_t	width )

Write to the device's vPCI configuration space.

Parameters

vbus	Capability of the system bus
handle	Device handle of the PCI device
reg	Register in configuration space to write
value	Value to write
width	Width to write in bits (e.g. 8, 16, 32)

Returns

0 on success, else failure

References L4_CV.

Referenced by L4vbus::Pci_dev::cfg_write().

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l4vbus_pcidev_irq_enable()

int l4vbus_pcidev_irq_enable	(	l4_cap_idx_t	vbus,
		l4vbus_device_handle_t	handle,
		unsigned char *	trigger,
		unsigned char *	polarity )

Enable the device's PCI interrupt.

Parameters

	vbus	Capability of the system bus
	handle	Device handle of the PCI device
[out]	trigger	False if interrupt is level-triggered
[out]	polarity	True if interrupt is of low polarity

Returns

On success: Interrupt line to be used, else failure

References L4_END_DECLS.

Referenced by L4vbus::Pci_dev::irq_enable().

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