vbus_pci

// vi:set ft=cpp: -*- Mode: C++ -*-
/*
 * (c) 2014 Sarah Hoffmann <sarah.hoffmann@kernkonzept.com>
 *
 * This file is part of TUD:OS and distributed under the terms of the
 * GNU General Public License 2.
 * Please see the COPYING-GPL-2 file for details.
 */
 
#pragma once
 
#include <l4/vbus/vbus>
#include <l4/vbus/vbus_pci.h>
 
namespace L4vbus {
 
class Pci_host_bridge : public Device
{
public:
  int cfg_read(l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg,
               l4_uint32_t *value, l4_uint32_t width) const
  {
    return l4vbus_pci_cfg_read(bus_cap().cap(), _dev, bus,
                               devfn, reg, value, width);
  }
 
 
  int cfg_write(l4_uint32_t bus, l4_uint32_t devfn, l4_uint32_t reg,
                l4_uint32_t value, l4_uint32_t width) const
  {
    return l4vbus_pci_cfg_write(bus_cap().cap(), _dev, bus,
                                devfn, reg, value, width);
  }
 
 
  int irq_enable(l4_uint32_t bus, l4_uint32_t devfn, int pin,
                 unsigned char *trigger, unsigned char *polarity) const
  {
    return l4vbus_pci_irq_enable(bus_cap().cap(), _dev, bus,
                                 devfn, pin, trigger, polarity);
  }
 
};
 
 
class Pci_dev : public Device
{
public:
  int cfg_read(l4_uint32_t reg, l4_uint32_t *value,
               l4_uint32_t width) const
  {
    return l4vbus_pcidev_cfg_read(bus_cap().cap(), _dev, reg, value, width);
  }
 
 
  int cfg_write(l4_uint32_t reg, l4_uint32_t value,
                l4_uint32_t width) const
  {
    return l4vbus_pcidev_cfg_write(bus_cap().cap(), _dev, reg, value, width);
  }
 
 
  int irq_enable(unsigned char *trigger, unsigned char *polarity) const
  {
    return l4vbus_pcidev_irq_enable(bus_cap().cap(), _dev, trigger, polarity);
  }
 
};
 
}